In digital data transmission systems, sequences of bits are exchanged between terminals through a transmission channel after having usually been submitted to a so-called "modulation" operation at the input terminal, and to a so-called "demodulation" operation at the output terminal. In fact, the bits or groups of bits converted into symbols, are transmitted or "emitted" one by one, at so-called "signalling instants" which are evenly separated and defined by a transmit clock. Consequently, the transmitted wave represents data only on said signalling instants which must be accurately defined. The transmit clock is often comprised of an oscillator of the so-called "digital phase locked" type (PLO). The PLO includes a crystal oscillator which is, therefore, accurate and stable, and operates at a frequency substantially exceeding the desired clock frequency. The crystal oscillator wave goes through frequency divider stages the output of which provides a signal having the adequate clock frequency. The clock signal phase is adjusted by controlling the dividing factors of the divider stages.
Thus, the emitter or transmitter can, to a certain extent, synchronize the internal operations performed to fetch out and process the bits to be emitted which are provided by a terminal at the operating rate of said terminal. In certain cases, the actuation of the PLO does not allow the synchronization problems to be properly solved. More particularly, this is the case when the phase of the clock signal defining the data bit rate, varies too briskly. Then, other means are used like those described in the IBM Technical Disclosure Bulletin, Vol. 22, No. 10, March 1980, pages 4597-4599. The rate at which the data are provided by a terminal and the rate at which the emitter fetches them out, are matched by using so-called "elastic" buffers. In addition to the fact that additional equipment is required to ensure the above indicated buffer function, the elasticity of the registers is limited by their size and by the differences between their loading and unloading rates. It is easy to understand that under certain operating conditions, some bits can be lost, which therefore, leads to transmission errors.
Also, in up-to-date transmission systems, a single transmitter or "emitter" is connected to service data from several terminals. Although the terminals individually connected to the system are exclusively actuated one by one, the transmitter clock must be able to quickly adjust itself to any one of the terminal clock phases and frequencies to enable proper operation of the system. In certain instances, the clock of the terminal to be connected may be in opposite phase and/or at a frequency different from the one of the presently connected terminal. The emitter clock should be able to be switched from one frequency to another and, more particularly, from one phase to another. This switching should be quickly carried out to avoid losing any data.